The upper half of this page provides entry areas for parameters used by the interface related to the substrate, plus a menu for choosing the units to use in the list file.
This entry sets, and is set by, the SubstrateThickness variable.
When the SubstrateThickness is nonzero, the substrate bounding box, which is the AOI, will be bloated by this value before writing of the substrate bottom and side interface panels to the list file. This will move the abrupt dielectric change at the substrate edge away from the area of interest.
If the SubstrateThickness is zero the FcPlaneBloat distance should be large enough to represent ``infinity'', but making it too large will slow down computation. The model is approximating the entire half-space filled with substrate dielectric material.
This entry sets, and is set by, the FcPlaneBloat variable.
The lower half of the page allows one to crudely refine the raw panels while being written to the list file. This is specifically for FasterCap-WR, which requires refined panelization for accuracy. The FasterCap program does not require external refinement, which is a major advantage. In fact, the refinement provided here should not be used with FasterCap, as it may interfere with FasterCap's refinement.
The refinement is ``crude'' due to each refined panel being approximately the same size. If the size is small enough, sufficient spatial resolution for accurate capacitance calculation is achieved. This resolution is needed along edges, and at corners, where there are strong field gradients, but is gross overkill for most areas. Since the solving time is related to the total number of refined panels, this type of refinement is very inefficient with respect to memory use and execution speed.
The refinement works as follows. First, the interface computes the total area of all conductor and dielectric raw panels that would be output to the list file. This area is divided by the FcPanelTarget number provided by the user. This is a number approximating the total refined panel count that FastCap-WR will need to process. The solution time should be approximately the same for the same panel count, independent of the actual geometry. The square root of the divided area is used when writing the panels to the list file. The raw panels are subdivided so that no panel edge is longer than this value.
A number like 10000 is probably about right for the FcPanelTarget in providing decent accuracy in a reasonable execution time. Larger numbers provide more accuracy, but require larger files and have longer solution time. The list file will contain a line for each refined panel. The entry area will take numbers up to 1e6, which is probably unreasonable for a normal computer.