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Generating Output and Running Simulations

Once the device properties have been entered, the user can export the circuit for further analysis. The deck command in the side menu can be used to produce a SPICE file of the current hierarchy. If the WRspice program is accessible, the run command in the side menu can be used to initiate analysis. The user will be prompted for a SPICE analysis string, and the simulation will run. A small window will appear that will inform the user when the analysis is complete.

After WRspice analysis, circuit variables may be plotted. The plot command in the side menu allows the user to click on circuit nodes to plot. After each click, the corresponding node is added to the string shown on the prompt line. This string can be edited manually in the usual way, if necessary. Pressing Enter will terminate the string, and the plot will be displayed on-screen. The iplot button works similarly to the plot button, though the plot will be generated dynamically during simulation on subsequent runs. Plotting is available only through the WRspice program.

Once properties have been entered, they are easy to alter without the use of the Properties command. The label button in the side menu is used primarily to add annotation to the drawing. However, if a label is selected before pressing the label button, the existing label can be edited, rather than a new label created. If the selected label is one of those created for a property, then that property can be altered merely by editing the label. Thus, to change a property of a device, click on the label to select it. Then, after pressing the label button, enter the new text. The circuit can then be re-simulated with the altered parameters.

One feature of Xic is the use of hypertext. This is most evident when using the plot command. When the user clicks on a circuit node, the name of that node is entered, in color, on the prompt line. Note that when using the arrow keys to move the prompt text cursor across a node name, the cursor widens to underline the name, and the name otherwise behaves as a single character. The name shown is a link to the internal database, and has the property that if the node number assigned to that contact point changes (it may, if the circuit is modified, as it is by default randomly assigned) the string will automatically be updated to the new node number.

When creating a label, clicking on a connection point in the drawing, for example, will enter a hypertext link to the node into the label. The label will always display the correct node number or name for the node. This is the means by which node labels should be added to the drawing.

The same feature can be used to set up specialized spice output. Suppose one wishes to use the save command in SPICE. A ``spicetext'' label can be created, where the nodes to be included in the save are inserted in the label by clicking on the drawing. When a SPICE file is produced, the contents of the ``spicetext'' labels is added to the deck. The resulting save command will always save the clicked-on nodes, whether of not the actual internally generated number changes.

The ``spicetext'' label is simply a label where the first word is ``spicetext'' or ``spicetextN'' where N is an integer. These labels have the property that any text following the ``spicetext'' keyword is added to the SPICE output verbatim. The optional integer that follows ``spicetext'' determines the order of appearance of the lines, where no integer is equivalent to 0. This is the mechanism for placing arbitrary text into the SPICE output.

This has been a brief introduction to the use of Xic in electrical mode. There are numerous commands and features, and many of the commands mentioned have not been fully described. The easiest way to learn Xic is to use it. After switching to electrical mode, press the Help button in the Help Menu. Pressing any button will bring up a description of that command. Press Esc to exit help mode.

If a cell has both a physical layout and electrical schematic, there is provision for verifying consistency of the two representations by performing layout vs. schematic (LVS) testing. This is one of the functions which can be found in the Extract Menu, and the process is described in Chapter 16.


next up previous contents index
Next: Cell Organization and Libraries Up: Electrical Schematic Editing Previous: Tap Wires   Contents   Index
Stephen R. Whiteley 2017-04-09